PKU Architecture & Circuit Innovations For Intelligent Chips
Assistant Professor · School of Integrated Circuits, Peking University
My research focuses on exploring efficient AI hardware including domain-specific accelerators, compute-in-memory architectures, LLM-assisted agile chip design, and efficient power/thermal management.
Prior to joining Peking University, I was an Assistant Research Professor at the Department of ECE, Carnegie Mellon University. I was a Postdoctoral Fellow in the Harvard Architecture, Circuits, and Compilers group at Harvard University (2020-2021). I obtained the Ph.D. degree in Computer Engineering (Best Thesis Award) from Northwestern University in 2019. My research has been published at top-tier venues including ISSCC, JSSC, VLSI, MICRO, DAC, ISCA, ASPLOS, etc.
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Address
Micro/Nano Electronics Building
5 Yiheyuan Rd, Haidian, Beijing 100871
Affiliation
School of Integrated Circuits
Peking University
PACIFIC Lab
PKU Architecture & Circuit Innovations For Intelligent Chips
"Exploring the Blue Ocean of Circuit and AI Architecture."